Many TOs for ASIC (SOC) products for industrial and consumer applications from major semiconductor manufacturers, both domestic and overseas.
We provide a verification environment tailored to customer needs, including system design such as bus construction and CPU peripheral block integration, logic design and verification, and verification IP to simplify verification and shorten TAT.
DFT implementation, including DFT specification construction for DFT integration of various IPs and optimization of overall fault detection.
Timing design and verification (STA) for timing optimization with emphasis on clock design, including high-speed IFs such as DDR and LVDS
Layout design technology to achieve the world's smallest area, lowest power, and highest speed
Extensive experience in designing functional IP such as memory controllers and CPU peripheral macros.
IP design assets that take into account the specifications of higher-level designs (subsystems, single chips)
Custom design and layout optimization considering the above hierarchy (module, 1-chip)