Cadence Design Systems, Japan
On 21st Jul. 2017, an engineer of us spoke at CDNLive 2017 hosted by Cadence Design Systems, Japan.
In this presentation, we introduced an example of using simulation and formal verification in the right place at the right time to check the quality indicators as a unified metric, and a case study of handling coverage in a unified manner.
We will continue to promote further efficiency to solve the problem of increasing verification costs due to the growing scale and complexity of LSI systems.