Core competence

More than 80% of our employees have more than 15 years of design experience at major semiconductor manufacturers, and we have designed more than 100 products so far.

We provide flexible designs and solutions based on our extensive experience.

Common to ASSP/ASIC/FPGA (front-end design)

  • Development of system LSIs with various embedded CPUs, from system design to logic design
  • Bus design to meet customer performance requirements in terms of latency, low power design, and timing constraints
  • Combining Dynamic and Formal Verification to Improve Verification Quality and Shorten Development Period for Large-Scale SoCs

Common to ASSP/ASIC/FPGA (back-end design)

  • Improve fault coverage and Design for Testability(DFT) to meet customer needs
  • Layout technology that realizes the world’s smallest area, high speed and power saving from large scale circuits to small IP
  • Proposal of Timing Analysis and Optimization Techniques for Realizing Timing closure
  • Implementation optimization technology that maximizes the potential of the manufacturing process regardless of how fabless it is
  • P&R technology that realizes large scale and high density by utilizing our superior timing closure technology

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The advantages of MAVISS

We are able to provide design and solutions for complex problems that cannot be solved by specific technologies alone, based on our extensive experience and expertise.

This reduces the risk of design setbacks and helps our customers to deliver more superior products.